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Quantity | Price |
---|---|
100+ | RM6.640 |
250+ | RM6.190 |
1000+ | RM5.700 |
3000+ | RM5.450 |
Product Information
Product Overview
ADN4662 is a single, CMOS, low voltage differential signalling (LVDS) line receiver offering data rates of over 400Mbps (200MHz) and ultra low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. Typical application includes point -to-point data transmission, multi drop buses, clock distribution networks and backplane receivers.
- ±15KV ESD protection on input pins
- Flow -through pinout simplifies PCB layout
- 2.5ns maximum propagation delay and 3.3V power supply
- High impedance outputs on power down and low power design of typically 18mW (quiescent)
- Interoperable with existing 5V LVDS drivers
- Accepts small swing (310mV typical) differential signal level
- Supports open, short and terminated input fail -safe
- 0V to -100mV threshold region and conforms to TIA/EIA -644 LVDS standard
- 8 lead NSOIC package
- Operating temperature range from -40°C to 85°C
Notes
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Technical Specifications
LVDS Differential Line Receiver
-
9mA
3V
NSOIC
NSOIC
400Mbps
CMOS, TTL
-
-
MSL 1 - Unlimited
LVDS Differential Line Receiver
-40°C
85°C
3.6V
8Pins
LVDS
CMOS, TTL
1bit
15kV
-
No SVHC (21-Jan-2025)
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate