AVR32SD32-I/QZB

AVR32SD32-I/QZB is an ASIL C & SIL 2 compliant dual core MCU for functional safety applications. This AVR® SD Family microcontroller, designed in compliance with the ISO 26262 functional safety standard, incorporates the AVR® CPU with a hardware multiplier running at clock speeds up to 20MHz. The family uses our latest technologies, with a flexible and low-power architecture, including an Event System, accurate analogue features, and advanced digital peripherals. The AVR® SD provides a dual-core lockstep CPU, Single-Error Correcting and Double-Error Detecting (SECDED) ECC on Flash, EEPROM and SRAM, Error Controller for functional safety, and Program and Debug Interface Disable (PDID) for security.

• Dual-core lockstep CPU, up to 20MHz, 2-cycle multiplier, single-cycle I/O access
• 32KB flash, 4KB SRAM, 256B EEPROM with ECC; 512B user row NVM, 256B boot row
• Power-on reset, Brown-out detector, voltage regulator monitor, multiple clock sources
• High-precision internal osc up to 20MHz, PLL to 48MHz, external crystals supported
• Three sleep modes such as idle, standby, power-down with full data retention options
• Timers: 16-bit TCA, up to 4 × 16-bit TCB, 12-bit TCD, 16-bit RTC for precise timing
• 3 USARTs, 2 SPI, 2 I2C; LIN, RS-485, SPI host/client, IrDA support
• Analog: 2 × 10-bit ADC, 10-bit DAC, 3 comparators, 2 ZCD, multiple internal refs
• System integrity: ERRCTRL, dual watchdogs, parity, VLM, optional heartbeat and tri-state I/O
• Available in 32 pin VQFN (WF) package