AD9523BCPZ

AD9523 is a jitter cleaner and clock generator with 14 differential or 29 LVCMOS outputs. It provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 3.6GHz to 4GHz. It is designed to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It is used in applications such as LTE and multicarrier GSM base stations, wireless and broadband infrastructure, medical instrumentation, clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, low jitter, low phase noise clock distribution, clock generation and translation for SONET, 10Ge, 10G FC, and other 10Gbps protocols, forward error correction (G.710), high performance wireless transceivers, ATE and high performance instrumentation.

• Start-up frequency accuracy is ±100ppm (determined by VCXO reference accuracy)
• Input-to-output edge timing is 150ps, 14 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS
• 14 dedicated output dividers with jitter-free adjustable delay
• Adjustable delay: 63 resolution steps of ½ period of VCO output divider
• Duty cycle correction for odd divider settings
• Digital lock detect, non-volatile EEPROM stores configuration settings
• SPI- and I²C-compatible serial control port, phase detector rate upto 130MHz
• Redundant reference inputs, automatic and manual reference switchover modes
• Output-to-output skew is 50ps typical, input-to-output edge timing is 150ps typical
• Operating temperature range from -40°C to +85°C, package style is 72-lead LFCSP-VQ

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party