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NEXPERIA 74AUP2G80DC,125

Flip-Flop, Inverted, Positive Edge, 74AUP2G80, D, 309 MHz, 20 mA, VSSOP

NEXPERIA 74AUP2G80DC,125
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Manufacturer:
NEXPERIA NEXPERIA
Manufacturer Part No:
74AUP2G80DC,125
Order Code:
2445029
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Technical Datasheet:
74AUP2G80DC,125   Datasheet
ECAD / MCAD
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Product Overview

The 74AUP2G80DC is a dual positive-edge triggered D-type Flip-flop with low-power. Information on the data input is transferred to the Q\ output on the low-to-high transition of the clock pulse. The input pin D must be stable one setup time prior to the low-to-high clock transition for predictable operation. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 to 3.6V. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 to 3.6V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
  • High noise immunity
  • IOFF Circuitry provides partial power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • Low noise overshoot and undershoot 10% of VCC
  • 0.9μA Maximum low static power consumption

Applications

Communications & Networking, Portable Devices, Consumer Electronics, Audio, Imaging, Video & Vision, Medical

Warnings

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.

Product Information

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:
74AUP2G80

:
D

:
309MHz

:
20mA

:
VSSOP

:
Positive Edge

:
Inverted

:
800mV

:
3.6V

:
74AUP

:
742G80

:
-40°C

:
125°C

:
-

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Technical Documents (1)

Packaging type Cut Tape
 
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Re-reel (minimum 100/reel):2445029RL Check stock

2,382 In stock Need more?

2,382 UK stock available for 3-4 business days delivery

Due to market conditions delivery times are for general guidance only and may be subject to change at short notice

RM2.20

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